STM32F4学习笔记一（F1和F4的独立看门狗）

stm32f4

F1和F4的独立看门狗基本一样，有一点不一样
F1的LSI = 40KHz左右，而F4的是 32KHz左右。
F4独立看门狗

F1独立看门狗

stm32f4

以后英文的不再翻译成汉语，英文更能准确的表达意思，翻译出来就不是那么一回事了。
*    ===================================================================
  *                                                     IWDG features
  *    ===================================================================
  *   
  *          The IWDG can be started by either software or hardware (configurable
  *          through option byte).
  *            
  *          The IWDG is clocked by its own dedicated low-speed clock (LSI) and
  *          thus stays active even if the main clock fails.
  *          Once the IWDG is started, the LSI is forced ON and cannot be disabled
  *          (LSI cannot be disabled too), and the counter starts counting down from
  *          the reset value of 0xFFF. When it reaches the end of count value (0x000)
  *          a system reset is generated.
  *          The IWDG counter should be reloaded at regular intervals to prevent
  *          an MCU reset.
  *                           
  *          The IWDG is implemented in the VDD voltage domain that is still functional
  *          in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).         
  *            
  *          IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
  *          reset occurs.
  *            
  *          Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
  *          The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
  *          devices provide the capability to measure the LSI frequency (LSI clock
  *          connected internally to TIM5 CH4 input capture). The measured value
  *          can be used to have an IWDG timeout with an acceptable accuracy.
  *          For more information, please refer to the STM32F4xx Reference manual

stm32f4

*          ===================================================================
  *                                 How to use this driver
  *          ===================================================================
  *          1. Enable write access to IWDG_PR and IWDG_RLR registers using
  *             IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
  *               
  *          2. Configure the IWDG prescaler using IWDG_SetPrescaler() function
  *            
  *          3. Configure the IWDG counter value using IWDG_SetReload() function.
  *             This value will be loaded in the IWDG counter each time the counter
  *             is reloaded, then the IWDG will start counting down from this value.
  *            
  *          4. Start the IWDG using IWDG_Enable() function, when the IWDG is used
  *             in software mode (no need to enable the LSI, it will be enabled
  *             by hardware)
  *            
  *          5. Then the application program must reload the IWDG counter at regular
  *             intervals during normal operation to prevent an MCU reset, using
  *             IWDG_ReloadCounter() function.