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在灵动的MM32F103VE上测试。512KB程序,两种校验方式:
1、全部读回校验耗时 0.932秒
2、C语言soft_crc32 校验耗时 1.4秒 (效率太低,没有啥价值)
3、汇编语言soft_crc32校验耗时 0.902秒
在STM32上测试
STM32F207RCT6,256K Flash
READ_BACK 461ms --读回校验
SOFT_CRC32 275ms --汇编CRC32算法
STM32_CRC32 170ms --STM32硬件CRC32
STM32G474CET6, 512K Flash
READ_BACK 931ms --读回校验
SOFT_CRC32 558ms --汇编CRC32算法
STM32_CRC32 316ms --STM32硬件CRC32
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下面是汇编语言的CRC32算法:(已经由IAR汇编格式修改为KEIL的格式)
;********************************************************************************************************
; uC/CRC
; ERROR DETECTING CODE (EDC) & ERROR CORRECTING CODE (ECC) CALCULATION UTILITIES
;
; Copyright 2007-2020 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
; This software is subject to an open source license and is distributed by
; Silicon Laboratories Inc. pursuant to the terms of the Apache License,
; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
;
;********************************************************************************************************
;********************************************************************************************************
;
; CYCLIC REDUNDANCY CHECK (CRC) CALCULATION
;
; ARM-Cortex-M3
; IAR Compiler
;
; Filename : edc_crc_a.asm
; Version : V1.10.00
;********************************************************************************************************
; Note(s) : (1) Assumes ARM CPU mode configured for Little Endian.
;********************************************************************************************************
;********************************************************************************************************
; PUBLIC FUNCTIONS
;********************************************************************************************************
; PUBLIC CRC_ChkSumCalcTbl_16Bit
; PUBLIC CRC_ChkSumCalcTbl_16Bit_ref
; PUBLIC CRC_ChkSumCalcTbl_32Bit
; PUBLIC CRC_ChkSumCalcTbl_32Bit_ref
;********************************************************************************************************
; CODE GENERATION DIRECTIVES
;********************************************************************************************************
; RSEG CODE:CODE:NOROOT(2)
AREA OSKERNEL, CODE, READONLY, ALIGN=2
PRESERVE8
EXPORT CRC_ChkSumCalcTbl_32Bit
EXPORT CRC_ChkSumCalcTbl_32Bit
THUMB
;$PAGE
;********************************************************************************************************
; CRC_ChkSumCalcTbl_32Bit()
;
; Description : Calculate a 32-bit CRC using a table without reflection.
;
; Argument(s) : init_val Initial CRC value.
;
; ptbl Pre-computed CRC table to use in calculation.
;
; pdata Pointer to data buffer over which CRC is generated.
;
; nbr_octets Number of data octets to use for calculation
;
; Return(s) : 32-bit CRC.
;
; Caller(s) : Application.
*********************************************************************************************************
; CPU_INT32 CRC_ChkSumCalcTbl_32Bit (CPU_INT32U init_val, @ ==> R0 == sum
; CPU_INT32U *ptbl, @ ==> R1
; CPU_INT08U *pdata, @ ==> R2
; CPU_INT32U nbr_octets) @ ==> R3
; ix @ ==> R4
; tbl_val @ ==> R5
; temp @ ==> R6
; 0x3FF @ ==> R7
CRC_ChkSumCalcTbl_32Bit
STMDB SP!, {R4-R7}
;********* M0 ***********************************
MOV R7, #0xFF
MOV R7, R7, LSL #2
;********* M3 ***********************************
;MOVW R7, #0x3FC
;**********************************************
CMP R3, #0
BEQ CRC_ChkSumCalcTbl_32Bit_END
CRC_ChkSumCalcTbl_32Bit_CHKALIGN32
AND R6, R2, #0x03
CMP R6, #0
BEQ CRC_ChkSumCalcTbl_32Bit_ALIGN32
CRC_ChkSumCalcTbl_32Bit_PRE
LDRB R4, [R2], #1 ; ix = *pdata++;
EOR R4, R4, R0, LSR #24 ; ix ^= (crc >> 24);
AND R4, R7, R4, LSL #2 ; ix = (ix * 4) & 0x3FC;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
SUB R3, R3, #1 ; nbytes--;
ADD R6, R6, #1
CMP R3, #0
BEQ CRC_ChkSumCalcTbl_32Bit_END
CMP R6, #4
BNE CRC_ChkSumCalcTbl_32Bit_PRE
B CRC_ChkSumCalcTbl_32Bit_ALIGN32
CRC_ChkSumCalcTbl_32Bit_ALIGN32_LOOP
LDR R6, [R2], #4 ; temp = *pdata++;
EOR R4, R6, R0, LSR #24 ; ix = temp ^ (crc >> 24);
AND R4, R7, R4, LSL #2 ; ix = (ix * 4) & 0x3FC;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
EOR R4, R6, R0, LSR #16 ; ix = temp ^ (crc >> 16);
AND R4, R7, R4, LSR #6 ; ix = ((ix >> 8) * 4) & 0x3FC;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
EOR R4, R6, R0, LSR #8 ; ix = temp ^ (crc >> 8);
AND R4, R7, R4, LSR #14 ; ix = ((ix >> 16) * 4) & 0x3FC;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
EOR R4, R6, R0 ; ix = temp ^ crc;
AND R4, R7, R4, LSR #22 ; ix = ((ix >> 24) * 4) & 0x3FF;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
SUB R3, R3, #4 ; nbytes -= 4;
CRC_ChkSumCalcTbl_32Bit_ALIGN32
CMP R3, #(04*01*01)
BCS CRC_ChkSumCalcTbl_32Bit_ALIGN32_LOOP
BCC CRC_ChkSumCalcTbl_32Bit_POST
CRC_ChkSumCalcTbl_32Bit_POST_LOOP
LDRB R4, [R2], #1 ; ix = *pdata++;
EOR R4, R4, R0, LSR #24 ; ix ^= (crc >> 24);
AND R4, R7, R4, LSL #2 ; ix = (ix * 4) & 0x3FC;
LDR R5, [R1, R4] ; tbl_val = *(ptbl + ix);
EOR R0, R5, R0, LSL #8 ; crc = (crc << 8) ^ tbl_val;
SUB R3, R3, #1 ; nbytes--;
CRC_ChkSumCalcTbl_32Bit_POST
CMP R3, #0
BNE CRC_ChkSumCalcTbl_32Bit_POST_LOOP
CRC_ChkSumCalcTbl_32Bit_END
LDMIA SP!, {R4-R7}
BX LR ; return
END
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下面是C语言的CRC32算法:
uint32_t soft_crc32(uint8_t *pStart, uint32_t uSize)
{
#define INIT 0xffffffffL
#define XOROT 0xffffffffL
uint32_t uCRCValue;
uint8_t *pData;
uCRCValue = INIT;
pData = pStart;
while (uSize--)
{
uCRCValue = crc32c_table[(uCRCValue ^ *pData++) & 0xFFL] ^ (uCRCValue >> 8);
}
return uCRCValue ^ XOROT;
}
static const uint32_t crc32c_table[256] = {
0x00000000L, 0xF26B8303L, 0xE13B70F7L, 0x1350F3F4L,
0xC79A971FL, 0x35F1141CL, 0x26A1E7E8L, 0xD4CA64EBL,
0x8AD958CFL, 0x78B2DBCCL, 0x6BE22838L, 0x9989AB3BL,
0x4D43CFD0L, 0xBF284CD3L, 0xAC78BF27L, 0x5E133C24L,
0x105EC76FL, 0xE235446CL, 0xF165B798L, 0x030E349BL,
0xD7C45070L, 0x25AFD373L, 0x36FF2087L, 0xC494A384L,
0x9A879FA0L, 0x68EC1CA3L, 0x7BBCEF57L, 0x89D76C54L,
0x5D1D08BFL, 0xAF768BBCL, 0xBC267848L, 0x4E4DFB4BL,
0x20BD8EDEL, 0xD2D60DDDL, 0xC186FE29L, 0x33ED7D2AL,
0xE72719C1L, 0x154C9AC2L, 0x061C6936L, 0xF477EA35L,
0xAA64D611L, 0x580F5512L, 0x4B5FA6E6L, 0xB93425E5L,
0x6DFE410EL, 0x9F95C20DL, 0x8CC531F9L, 0x7EAEB2FAL,
0x30E349B1L, 0xC288CAB2L, 0xD1D83946L, 0x23B3BA45L,
0xF779DEAEL, 0x05125DADL, 0x1642AE59L, 0xE4292D5AL,
0xBA3A117EL, 0x4851927DL, 0x5B016189L, 0xA96AE28AL,
0x7DA08661L, 0x8FCB0562L, 0x9C9BF696L, 0x6EF07595L,
0x417B1DBCL, 0xB3109EBFL, 0xA0406D4BL, 0x522BEE48L,
0x86E18AA3L, 0x748A09A0L, 0x67DAFA54L, 0x95B17957L,
0xCBA24573L, 0x39C9C670L, 0x2A993584L, 0xD8F2B687L,
0x0C38D26CL, 0xFE53516FL, 0xED03A29BL, 0x1F682198L,
0x5125DAD3L, 0xA34E59D0L, 0xB01EAA24L, 0x42752927L,
0x96BF4DCCL, 0x64D4CECFL, 0x77843D3BL, 0x85EFBE38L,
0xDBFC821CL, 0x2997011FL, 0x3AC7F2EBL, 0xC8AC71E8L,
0x1C661503L, 0xEE0D9600L, 0xFD5D65F4L, 0x0F36E6F7L,
0x61C69362L, 0x93AD1061L, 0x80FDE395L, 0x72966096L,
0xA65C047DL, 0x5437877EL, 0x4767748AL, 0xB50CF789L,
0xEB1FCBADL, 0x197448AEL, 0x0A24BB5AL, 0xF84F3859L,
0x2C855CB2L, 0xDEEEDFB1L, 0xCDBE2C45L, 0x3FD5AF46L,
0x7198540DL, 0x83F3D70EL, 0x90A324FAL, 0x62C8A7F9L,
0xB602C312L, 0x44694011L, 0x5739B3E5L, 0xA55230E6L,
0xFB410CC2L, 0x092A8FC1L, 0x1A7A7C35L, 0xE811FF36L,
0x3CDB9BDDL, 0xCEB018DEL, 0xDDE0EB2AL, 0x2F8B6829L,
0x82F63B78L, 0x709DB87BL, 0x63CD4B8FL, 0x91A6C88CL,
0x456CAC67L, 0xB7072F64L, 0xA457DC90L, 0x563C5F93L,
0x082F63B7L, 0xFA44E0B4L, 0xE9141340L, 0x1B7F9043L,
0xCFB5F4A8L, 0x3DDE77ABL, 0x2E8E845FL, 0xDCE5075CL,
0x92A8FC17L, 0x60C37F14L, 0x73938CE0L, 0x81F80FE3L,
0x55326B08L, 0xA759E80BL, 0xB4091BFFL, 0x466298FCL,
0x1871A4D8L, 0xEA1A27DBL, 0xF94AD42FL, 0x0B21572CL,
0xDFEB33C7L, 0x2D80B0C4L, 0x3ED04330L, 0xCCBBC033L,
0xA24BB5A6L, 0x502036A5L, 0x4370C551L, 0xB11B4652L,
0x65D122B9L, 0x97BAA1BAL, 0x84EA524EL, 0x7681D14DL,
0x2892ED69L, 0xDAF96E6AL, 0xC9A99D9EL, 0x3BC21E9DL,
0xEF087A76L, 0x1D63F975L, 0x0E330A81L, 0xFC588982L,
0xB21572C9L, 0x407EF1CAL, 0x532E023EL, 0xA145813DL,
0x758FE5D6L, 0x87E466D5L, 0x94B49521L, 0x66DF1622L,
0x38CC2A06L, 0xCAA7A905L, 0xD9F75AF1L, 0x2B9CD9F2L,
0xFF56BD19L, 0x0D3D3E1AL, 0x1E6DCDEEL, 0xEC064EEDL,
0xC38D26C4L, 0x31E6A5C7L, 0x22B65633L, 0xD0DDD530L,
0x0417B1DBL, 0xF67C32D8L, 0xE52CC12CL, 0x1747422FL,
0x49547E0BL, 0xBB3FFD08L, 0xA86F0EFCL, 0x5A048DFFL,
0x8ECEE914L, 0x7CA56A17L, 0x6FF599E3L, 0x9D9E1AE0L,
0xD3D3E1ABL, 0x21B862A8L, 0x32E8915CL, 0xC083125FL,
0x144976B4L, 0xE622F5B7L, 0xF5720643L, 0x07198540L,
0x590AB964L, 0xAB613A67L, 0xB831C993L, 0x4A5A4A90L,
0x9E902E7BL, 0x6CFBAD78L, 0x7FAB5E8CL, 0x8DC0DD8FL,
0xE330A81AL, 0x115B2B19L, 0x020BD8EDL, 0xF0605BEEL,
0x24AA3F05L, 0xD6C1BC06L, 0xC5914FF2L, 0x37FACCF1L,
0x69E9F0D5L, 0x9B8273D6L, 0x88D28022L, 0x7AB90321L,
0xAE7367CAL, 0x5C18E4C9L, 0x4F48173DL, 0xBD23943EL,
0xF36E6F75L, 0x0105EC76L, 0x12551F82L, 0xE03E9C81L,
0x34F4F86AL, 0xC69F7B69L, 0xD5CF889DL, 0x27A40B9EL,
0x79B737BAL, 0x8BDCB4B9L, 0x988C474DL, 0x6AE7C44EL,
0xBE2DA0A5L, 0x4C4623A6L, 0x5F16D052L, 0xAD7D5351L
};
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