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发表于 2025-4-8 09:33:46
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本帖最后由 lhh 于 2025-4-8 09:51 编辑
下边是发生hardfault时使用H7-TOOL进行异常分析的结果，顺便说下H7-TOOL异常分析的功能真好用，解释的很清晰。
2023-02-23 V1.0
============================================================
=========寄存器值读取========================================
============================================================
R0 = 0000000a
R1 = 01602806
R2 = 00000000
R3 = 0660c819
R4 = c02e9124
R5 = 20020000
R6 = c02d45b6
R7 = 2000b492
R8 = 000000ff
R9 = 0000000e
R10 = 000000d2
R11 = 0000001c
R12 = 000000ff
R13(SP) = 24043a98
R14(LR) = fffffffd
R15(PC) = 08055fe6
xPSR = a1000003
------------------------------------------------------------------
Read System Handler Control and State Register SHCSR = 0x00010000
------------------------------------------------------------------
MEMFAULTACT = 0
BUSFAULTACT = 0
USGFAULTACT = 0
SVCALLACT = 0
MONITORACT = 0
PENDSVACT = 0
SYSTICKACT = 0
USGFAULTPENDED = 0
MEMFAULTPENDED = 0
BUSFAULTPENDED = 0
SVCALLPENDED = 0
MEMFAULTENA = 1, Memory management fault 异常使能
BUSFAULTENA = 0
USGFAULTENA = 0
------------------------------------------------------------------
Read HardFault Status Register HSFR Register = 0x40000000
------------------------------------------------------------------
VECTBL = 0, 中断向量表无Bus Fault
FORCED = 1, forced Hard Fault
Indicates a forced Hard Fault, generated by escalation of a fault with configurable
priority that cannot be handled, either because of priority or because it is disabled
When this bit is set, the Hard Fault handler must read the other fault status registers
to find the cause of the fault
------------------------------------------------------------------
MemManage Status Register (MMFSR) = 0x00
------------------------------------------------------------------
IACCVIOL = 0, 无指令访问冲突错误
DACCVIOL = 0, 无数据访问异常
MUNSTKERR = 0, 出栈正常
MSTKERR = 0, 入栈正常
MLSPERR = 0, 浮点lazy stacking特性保存期间未发生故障
MMARVALID = 0, SCB->MMFAR寄存器没有记录异常地址
------------------------------------------------------------------
MemManage Address Register (MMFAR) = 0x20020000
------------------------------------------------------------------
Data address for a MemManage fault. This register is updated with the address of a location
that produced a MemManage fault. The MMFSR shows the cause of the fault. This field is valid
only when MMFSR.MMARVALID is set. In implementations without unique BFAR and MMFAR
registers, the value of this register is UNKNOWN if BFSR.BFARVALID is set
------------------------------------------------------------------
BusFault Status Register (BFSR) = 0x82
------------------------------------------------------------------
IBUSERR = 0, 指令总线正常
PRECISERR = 1, 精确的数据总线访问异常
a data bus error has occurred, and the PC value stacked for the exception return points to
the instruction that caused the fault.
When the processor sets this bit, it writes the faulting address to BFAR.
IMPRECISERR = 0, 数据总线正常
UNSTKERR = 0, 中断出栈时正常
STKERR = 0, 中断入栈时正常
LSPERR = 0, 浮点lazy stacking特性保存期间未生故障
BFARVALID = 1, BFAR寄存器记录有效的异常地址
The processor sets this bit after a BusFault where the address is known. Other faults can set this
bit to 0, such as a MemManage fault occurring later. If a BusFault occurs and is escalated to a
HardFault because of priority, the HardFault handler must set this bit to 0. This prevents
problems if returning to a stacked active BusFault handler who is BFAR value has been
overwritten.
------------------------------------------------------------------
BusFault Address Register (BFAR) = 0x20020000
------------------------------------------------------------------
Data address for a precise BusFault. This register is updated with the address of a location that
produced a BusFault. The BFSR shows the reason for the fault. This field is valid only when
BFSR.BFARVALID is set. In implementations without unique BFAR and MMFAR registers, the
value of this register is UNKNOWN if MMFSR.MMARVALID is set
------------------------------------------------------------------
UsageFault Status Register (UFSR) = 0x0000
------------------------------------------------------------------
UNDEFINSTR = 0, 处理器访问指令正常
INVSTATE = 0, 没有无效状态
INVPC = 0, PC加载正常
NOCP = 0, 访问协处理正常
UNALIGNED = 0, 内存对齐访问正常
DIVBYZERO = 0, 无除数为0的异常, 或者没有使能除数为0的异常
============================================================
=========异常进一步分析======================================
============================================================
进入和退出中断使用PSP, 返回线程模, 进入中断前没有使用硬件浮点单元
进入硬件异常前, 寄存器数值, 如果出现非精确异常, 这些值是不准确的：
R0 = 00000000
R1 = 240196fc
R2 = 080b3618
R3 = 0000084b
R12 = 080ae17d
LR = 080a8ab5
PC = 080a8acc
PSR = 61000000
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发表于 2025-4-8 09:25:25
发表于 2025-4-8 10:44:46
