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您好~
我想請教有關STM32F426I-DISCO 開發版上所使用的SDRAM資料存取時間是否能夠更快速?
以下是我量測存取時間驗證方式:
使用GPIOG Pin13 驗證寫入時間,將得到的時間除與BUFF_SIZE,驗證每筆資料儲存時間,其中BUFF_SIZE為2048。得到每筆資料寫入時間為1.02s/2048=498.0468us。
GPIOG->ODR = GPIO_Pin_13;
for(adr=0;adr<BUFF_SIZE;adr++){
*(unsigned int*) (SDRAM_START_ADR + (adr << 2)) = write[adr];
}
GPIOG->ODR = ~GPIO_Pin_13;
使用GPIOG Pin14 驗證讀取時間,將得到的時間除與BUFF_SIZE,驗證每筆資料儲存時間,其中BUFF_SIZE為2048。得到每筆資料寫入時間為2.5s/2048=1220.7031us。
GPIOG->ODR = GPIO_Pin_14;
for(adr=0;adr<BUFF_SIZE;adr++){
read[adr] = *(unsigned int*)(SDRAM_START_ADR +(adr << 2));
}
GPIOG->ODR = ~GPIO_Pin_14;
SDRAM FMC設定如下:
void P_SDRAM_InitFMC(void)
{
FMC_SDRAMInitTypeDef FMC_SDRAMInitStructure;
FMC_SDRAMTimingInitTypeDef FMC_SDRAMTimingInitStructure;
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FMC, ENABLE);
//---------------------------------------------------------
// FMC auf 180MHz/2 = 90MHz einstellen
// 90MHz = 11,11 ns
// Alle Timings laut Datasheet und Speedgrade -7 (=7ns)
//---------------------------------------------------------
FMC_SDRAMTimingInitStructure.FMC_LoadToActiveDelay = 2; // tMRD=2CLK
FMC_SDRAMTimingInitStructure.FMC_ExitSelfRefreshDelay = 7; // tXSR min=70ns
FMC_SDRAMTimingInitStructure.FMC_SelfRefreshTime = 4; // tRAS min=42ns
FMC_SDRAMTimingInitStructure.FMC_RowCycleDelay = 7; // tRC min=63ns
FMC_SDRAMTimingInitStructure.FMC_WriteRecoveryTime = 2; // tWR =2CLK
FMC_SDRAMTimingInitStructure.FMC_RPDelay = 2; // tRP min=15ns
FMC_SDRAMTimingInitStructure.FMC_RCDDelay = 2; // tRCD min=15ns
FMC_SDRAMInitStructure.FMC_Bank = FMC_Bank2_SDRAM;
FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;
FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_12b;
FMC_SDRAMInitStructure.FMC_SDMemoryDataWidth = SDRAM_MEMORY_WIDTH;
FMC_SDRAMInitStructure.FMC_InternalBankNumber = FMC_InternalBank_Number_4;
FMC_SDRAMInitStructure.FMC_CASLatency = SDRAM_CAS_LATENCY;
FMC_SDRAMInitStructure.FMC_WriteProtection = FMC_Write_Protection_Disable;
FMC_SDRAMInitStructure.FMC_SDClockPeriod = SDRAM_CLOCK_PERIOD;
FMC_SDRAMInitStructure.FMC_ReadBurst = SDRAM_READBURST;
FMC_SDRAMInitStructure.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_1;
FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &FMC_SDRAMTimingInitStructure;
FMC_SDRAMInit(&FMC_SDRAMInitStructure);
P_SDRAM_InitSequence();
}
void P_SDRAM_InitSequence(void)
{
FMC_SDRAMCommandTypeDef FMC_SDRAMCommandStructure;
uint32_t tmpr = 0;
FMC_SDRAMCommandStructure.FMC_CommandMode = FMC_Command_Mode_CLK_Enabled;
FMC_SDRAMCommandStructure.FMC_CommandTarget = FMC_Command_Target_bank2;
FMC_SDRAMCommandStructure.FMC_AutoRefreshNumber = 1;
FMC_SDRAMCommandStructure.FMC_ModeRegisterDefinition = 0;
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
FMC_SDRAMCmdConfig(&FMC_SDRAMCommandStructure);
P_SDRAM_delay(10);
FMC_SDRAMCommandStructure.FMC_CommandMode = FMC_Command_Mode_PALL;
FMC_SDRAMCommandStructure.FMC_CommandTarget = FMC_Command_Target_bank2;
FMC_SDRAMCommandStructure.FMC_AutoRefreshNumber = 1;
FMC_SDRAMCommandStructure.FMC_ModeRegisterDefinition = 0;
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
FMC_SDRAMCmdConfig(&FMC_SDRAMCommandStructure);
FMC_SDRAMCommandStructure.FMC_CommandMode = FMC_Command_Mode_AutoRefresh;
FMC_SDRAMCommandStructure.FMC_CommandTarget = FMC_Command_Target_bank2;
FMC_SDRAMCommandStructure.FMC_AutoRefreshNumber = 4;
FMC_SDRAMCommandStructure.FMC_ModeRegisterDefinition = 0;
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
FMC_SDRAMCmdConfig(&FMC_SDRAMCommandStructure);
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
FMC_SDRAMCmdConfig(&FMC_SDRAMCommandStructure);
tmpr = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_2 |
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
SDRAM_MODEREG_CAS_LATENCY_3 |
SDRAM_MODEREG_OPERATING_MODE_STANDARD |
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
FMC_SDRAMCommandStructure.FMC_CommandMode = FMC_Command_Mode_LoadMode;
FMC_SDRAMCommandStructure.FMC_CommandTarget = FMC_Command_Target_bank2;
FMC_SDRAMCommandStructure.FMC_AutoRefreshNumber = 1;
FMC_SDRAMCommandStructure.FMC_ModeRegisterDefinition = tmpr;
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
FMC_SDRAMCmdConfig(&FMC_SDRAMCommandStructure);
//-----------------------------------------------
// FMC_CLK = 90MHz
// Refresh_Rate = 7.81us
// Counter = (FMC_CLK * Refresh_Rate) - 20
//-----------------------------------------------
FMC_SetRefreshCount(683);
while(FMC_GetFlagStatus(FMC_Bank2_SDRAM, FMC_FLAG_Busy) != RESET);
}
系統相關時脈設定,如下:
/************************* PLL Parameters *************************************/
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_M 8
/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 8
#if defined (STM32F40_41xxx)
#define PLL_N 336
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
#define PLL_N 360 //336
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
#endif /* STM32F427_437x || STM32F429_439xx */
#if defined (STM32F401xx)
#define PLL_N 336
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 4
#endif /* STM32F401xx */
/******************************************************************************/
SDRAM Datasheet 如下網址:
http://www.issi.com/WW/pdf/42-45S16400J.pdf |
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