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[RL-TCPnet V7.X] 【原创】符合CMSIS-Driver驱动规范的以太网DM9000驱动实现，含STM32H7，STM32F407和STM32F429支持（2020-11-29）

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eric2013

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发表于 2020-11-29 10:05:44 | 显示全部楼层 |阅读模式
这个驱动的实现，耗费了我很多天的精力才做稳定，虽然有点舍不得，但还是将其分享给大家，此贴驱动是专门为V5，V6和V7开发板的双网口教程准备的。


STM32H7:
ETH_DM9000.c
ETH_DM9000.h
DM9000_BSP.c
DM9000_BSP.h

STM32F407:
ETH_DM9000.c
ETH_DM9000.h
DM9000_BSP.c
DM9000_BSP.h

STM32F429:
DM9000_BSP.c
DM9000_BSP.h
ETH_DM9000.c
ETH_DM9000.h


  1. /*
  2. *********************************************************************************************************
  3. *
  4. *        模块名称 : CMSIS-Driver
  5. *        文件名称 : ETH_DM9000.c
  6. *        版    本 : V1.0
  7. *        说    明 : CMSIS-Driver的DM9000底层驱动实现【安富莱原创】
  8. *
  9. *        修改记录 :
  10. *                版本号    日期        作者     说明
  11. *                V1.0    2020-11-21   Eric2013 正式发布
  12. *
  13. *        Copyright (C), 2020-2030, 安富莱电子 www.armfly.com
  14. *
  15. *********************************************************************************************************
  16. */
  17. #include <string.h>
  18. #include "cmsis_compiler.h"

  20. #include "Driver_ETH_MAC.h"
  21. #include "Driver_ETH_PHY.h"
  22. #include "ETH_DM9000.h"
  23. #include "DM9000_BSP.h"


  26. #define ARM_ETH_MAC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) /* driver version */
  27. #define ARM_ETH_PHY_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) /* driver version */


  30. /* Ethernet MAC driver number (default) */
  31. #ifndef ETH_MAC_NUM
  32. #define ETH_MAC_NUM             1
  33. #endif

  35. /* Ethernet PHY driver number (default) */
  36. #ifndef ETH_PHY_NUM
  37. #define ETH_PHY_NUM             1
  38. #endif

  40. #ifdef __clang__
  41.   #define __rbit(v)             __builtin_arm_rbit(v)
  42. #endif

  44. /* Driver Version */
  45. static const ARM_DRIVER_VERSION MAC_DriverVersion = {
  46.   ARM_ETH_MAC_API_VERSION,
  47.   ARM_ETH_MAC_DRV_VERSION
  48. };

  50. /* Driver Capabilities */
  51. static const ARM_ETH_MAC_CAPABILITIES MAC_DriverCapabilities = {
  52.   0,                                /* checksum_offload_rx_ip4  */
  53.   0,                                /* checksum_offload_rx_ip6  */
  54.   0,                                /* checksum_offload_rx_udp  */
  55.   0,                                /* checksum_offload_rx_tcp  */
  56.   0,                                /* checksum_offload_rx_icmp */
  57.   0,                                /* checksum_offload_tx_ip4  */
  58.   0,                                /* checksum_offload_tx_ip6  */
  59.   0,                                /* checksum_offload_tx_udp  */
  60.   0,                                /* checksum_offload_tx_tcp  */
  61.   0,                                /* checksum_offload_tx_icmp */
  62.   0,                                /* media_interface          */
  63.   0,                                /* mac_address              */
  64.   1,                                /* event_rx_frame           */
  65.   0,                                /* event_tx_frame           */
  66.   0,                                /* event_wakeup             */
  67.   0,                                /* precision_timer          */
  68.   0                                 /* reserved                 */
  69. };

  71. /* Driver control structure */
  72. static ETH_CTRL ETH = { 0, 0, 0, 0, 0 };

  74. /* Local functions */
  75. static uint32_t reg_rd (uint8_t reg);
  76. static void     reg_wr (uint8_t reg, uint32_t val);


  79. #define   NET_BASE_ADDR                0x68400000UL
  80. #define   NET_REG_ADDR                (*((volatile uint16_t *) NET_BASE_ADDR))
  81. #define   NET_REG_DATA                (*((volatile uint16_t *) (NET_BASE_ADDR + 0x00080000)))

  83. /**
  84.   Read register value.

  86.   \param[in]   reg  Register to read
  87. */
  88. static uint32_t reg_rd (uint8_t reg) {
  89.         
  90.         NET_REG_ADDR = reg;
  91.         return (NET_REG_DATA);
  92. }

  94. /**
  95.   Write register value.

  97.   \param[in]   reg  Register to write
  98.   \param[in]   val  Value to write
  99. */
  100. static void reg_wr (uint8_t reg, uint32_t val) {
  101.         
  102.         NET_REG_ADDR = reg;
  103.         NET_REG_DATA = val;
  104.         
  105. }

  107. /* Ethernet Driver functions */

  109. /**
  110.   \fn          ARM_DRIVER_VERSION GetVersion (void)
  111.   \brief       Get driver version.
  112.   \return      \ref ARM_DRIVER_VERSION
  113. */
  114. static ARM_DRIVER_VERSION MAC_GetVersion (void) {
  115.   return MAC_DriverVersion;
  116. }

  118. /**
  119.   \fn          ARM_ETH_MAC_CAPABILITIES GetCapabilities (void)
  120.   \brief       Get driver capabilities.
  121.   \return      \ref ARM_ETH_MAC_CAPABILITIES
  122. */
  123. static ARM_ETH_MAC_CAPABILITIES MAC_GetCapabilities (void) {
  124.   return MAC_DriverCapabilities;
  125. }

  127. /**
  128.   \fn          int32_t Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
  129.   \brief       Initialize Ethernet MAC Device.
  130.   \param[in]   cb_event  Pointer to \ref ARM_ETH_MAC_SignalEvent
  131.   \return      \ref execution_status
  132. */
  133. static int32_t MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event) {
  134.   (void)cb_event;

  136.   if (ETH.Flags & ETH_INIT) { return ARM_DRIVER_OK; }

  138.   /* Determine number of CPU cycles within 1us */
  139.   if (SystemCoreClock < 1000000U) {
  140.     ETH.Us_Cyc = 1U;
  141.   } else {
  142.     ETH.Us_Cyc = (SystemCoreClock + (1000000U-1U)) / 1000000U;
  143.   }

  145.   ETH.Flags = ETH_INIT;
  146.   ETH.cb_event = cb_event;

  148.   etherdev_init();
  149.   
  150.   return ARM_DRIVER_OK;
  151. }

  153. /**
  154.   \fn          int32_t Uninitialize (void)
  155.   \brief       De-initialize Ethernet MAC Device.
  156.   \return      \ref execution_status
  157. */
  158. static int32_t MAC_Uninitialize (void) {

  160.   ETH.Flags = 0U;

  162.   return ARM_DRIVER_OK;
  163. }

  165. /**
  166.   \fn          int32_t PowerControl (ARM_POWER_STATE state)
  167.   \brief       Control Ethernet MAC Device Power.
  168.   \param[in]   state  Power state
  169.   \return      \ref execution_status
  170. */
  171. static int32_t MAC_PowerControl (ARM_POWER_STATE state) {
  172.   switch ((int32_t)state) {
  173.     case ARM_POWER_OFF:
  174.       ETH.Flags &= ETH_POWER;
  175.       break;

  177.     case ARM_POWER_LOW:
  178.       return ARM_DRIVER_ERROR_UNSUPPORTED;

  180.     case ARM_POWER_FULL:
  181.       if ((ETH.Flags & ETH_INIT) == 0) {
  182.         return ARM_DRIVER_ERROR;
  183.       }
  184.       if (ETH.Flags & ETH_POWER) {
  185.         return ARM_DRIVER_OK;
  186.       }

  188.       ETH.Flags |= ETH_POWER;
  189.       break;

  191.     default:
  192.       return ARM_DRIVER_ERROR_UNSUPPORTED;
  193.   }

  195.   return ARM_DRIVER_OK;
  196. }

  198. /**
  199.   \fn          int32_t GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
  200.   \brief       Get Ethernet MAC Address.
  201.   \param[in]   ptr_addr  Pointer to address
  202.   \return      \ref execution_status
  203. */
  204. static int32_t MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) {
  205.   
  206.   if (ptr_addr == NULL) {
  207.     return ARM_DRIVER_ERROR_PARAMETER;
  208.   }

  210.   if ((ETH.Flags & ETH_POWER) == 0U) {
  211.     return ARM_DRIVER_ERROR;
  212.   }
  213.   
  214.   ptr_addr->b[0] = reg_rd (DM9000_REG_PAR + 0);
  215.   ptr_addr->b[1] = reg_rd (DM9000_REG_PAR + 1);
  216.   ptr_addr->b[2] = reg_rd (DM9000_REG_PAR + 2);
  217.   ptr_addr->b[3] = reg_rd (DM9000_REG_PAR + 3);
  218.   ptr_addr->b[4] = reg_rd (DM9000_REG_PAR + 4);
  219.   ptr_addr->b[5] = reg_rd (DM9000_REG_PAR + 5);

  221.   return ARM_DRIVER_OK;
  222. }

  224. /**
  225.   \fn          int32_t SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr)
  226.   \brief       Set Ethernet MAC Address.
  227.   \param[in]   ptr_addr  Pointer to address
  228.   \return      \ref execution_status
  229. */
  230. static int32_t MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) {

  232.   if (ptr_addr == NULL) {
  233.     return ARM_DRIVER_ERROR_PARAMETER;
  234.   }

  236.   if ((ETH.Flags & ETH_POWER) == 0U) {
  237.     return ARM_DRIVER_ERROR;
  238.   }
  239.   
  240.   reg_wr (DM9000_REG_PAR + 0, ptr_addr->b[0]);
  241.   reg_wr (DM9000_REG_PAR + 1, ptr_addr->b[1]);
  242.   reg_wr (DM9000_REG_PAR + 2, ptr_addr->b[2]);
  243.   reg_wr (DM9000_REG_PAR + 3, ptr_addr->b[3]);
  244.   reg_wr (DM9000_REG_PAR + 4, ptr_addr->b[4]);
  245.   reg_wr (DM9000_REG_PAR + 5, ptr_addr->b[5]);

  247.   return ARM_DRIVER_OK;
  248. }

  250. /**
  251.   \fn          int32_t SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr,
  252.                                                uint32_t          num_addr)
  253.   \brief       Configure Address Filter.
  254.   \param[in]   ptr_addr  Pointer to addresses
  255.   \param[in]   num_addr  Number of addresses to configure
  256.   \return      \ref execution_status
  257. */
  258. static int32_t MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr) {
  259.   if ((ptr_addr == NULL) && (num_addr != 0U)) {
  260.     return ARM_DRIVER_ERROR_PARAMETER;
  261.   }

  263.   if ((ETH.Flags & ETH_POWER) == 0U) {
  264.     return ARM_DRIVER_ERROR;
  265.   }

  267.   return ARM_DRIVER_OK;
  268. }

  270. /**
  271.   \fn          int32_t SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags)
  272.   \brief       Send Ethernet frame.
  273.   \param[in]   frame  Pointer to frame buffer with data to send
  274.   \param[in]   len    Frame buffer length in bytes
  275.   \param[in]   flags  Frame transmit flags (see ARM_ETH_MAC_TX_FRAME_...)
  276.   \return      \ref execution_status
  277. */
  278. static int32_t MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) {
  279.   if ((frame == NULL) || (len == 0U)) {
  280.     return ARM_DRIVER_ERROR_PARAMETER;
  281.   }

  283.   if ((ETH.Flags & ETH_POWER) == 0U) {
  284.     return ARM_DRIVER_ERROR;
  285.   }
  286.   
  287.   dm9k_send_packet((uint8_t *)frame, len);

  289.   return ARM_DRIVER_OK;
  290. }

  292. /**
  293.   \fn          int32_t ReadFrame (uint8_t *frame, uint32_t len)
  294.   \brief       Read data of received Ethernet frame.
  295.   \param[in]   frame  Pointer to frame buffer for data to read into
  296.   \param[in]   len    Frame buffer length in bytes
  297.   \return      number of data bytes read or execution status
  298.                  - value >= 0: number of data bytes read
  299.                  - value < 0: error occurred, value is execution status as defined with \ref execution_status
  300. */
  301. static int32_t MAC_ReadFrame (uint8_t *frame, uint32_t len) {
  302.         int32_t rval = ARM_DRIVER_OK;
  303.         
  304.         uint16_t *src2 = (uint16_t *)frame;
  305.         uint16_t temp;
  306.         uint32_t blkCnt;
  307.         
  308.         
  309.         blkCnt = len >> 3U;
  310.                
  311.         while (blkCnt > 0U)
  312.         {
  313.                 *src2++ = NET_REG_DATA;
  314.                 *src2++ = NET_REG_DATA;
  315.                 *src2++ = NET_REG_DATA;
  316.                 *src2++ = NET_REG_DATA;
  317.                 blkCnt--;
  318.         }

  320.         blkCnt = (len/2) % 0x4U;

  322.         while (blkCnt > 0U)
  323.         {
  324.                 *src2++ = NET_REG_DATA;
  325.                 blkCnt--;
  326.         }
  327.         
  328.         if(len%2)
  329.         {
  330.                 frame[len - 1] = (uint8_t)NET_REG_DATA;
  331.         }
  332.         
  333.         temp = NET_REG_DATA;
  334.         temp = NET_REG_DATA;        

  336.     (void)temp;
  337.         return (rval);
  338. }

  340. /**
  341.   \fn          uint32_t GetRxFrameSize (void)
  342.   \brief       Get size of received Ethernet frame.
  343.   \return      number of bytes in received frame
  344. */
  345. static uint32_t MAC_GetRxFrameSize (void) {
  346.     uint32_t len = 0;

  348.     if ((ETH.Flags & ETH_POWER) == 0U) {
  349.         return (0U);
  350.     }

  352.     len = GetSize();

  354.     return (len);
  355. }

  357. /**
  358.   \fn          int32_t GetRxFrameTime (ARM_ETH_MAC_TIME *time)
  359.   \brief       Get time of received Ethernet frame.
  360.   \param[in]   time  Pointer to time structure for data to read into
  361.   \return      \ref execution_status
  362. */
  363. static int32_t MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time) {
  364.   (void)time;
  365.   return ARM_DRIVER_ERROR_UNSUPPORTED;
  366. }

  368. /**
  369.   \fn          int32_t GetTxFrameTime (ARM_ETH_MAC_TIME *time)
  370.   \brief       Get time of transmitted Ethernet frame.
  371.   \param[in]   time  Pointer to time structure for data to read into
  372.   \return      \ref execution_status
  373. */
  374. static int32_t MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time) {
  375.   (void)time;
  376.   return ARM_DRIVER_ERROR_UNSUPPORTED;
  377. }

  379. /**
  380.   \fn          int32_t ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
  381.   \brief       Control Precision Timer.
  382.   \param[in]   control  Operation
  383.   \param[in]   time     Pointer to time structure
  384.   \return      \ref execution_status
  385. */
  386. static int32_t MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) {
  387.   (void)control;
  388.   (void)time;
  389.   return ARM_DRIVER_ERROR_UNSUPPORTED;
  390. }

  392. /**
  393.   \fn          int32_t Control (uint32_t control, uint32_t arg)
  394.   \brief       Control Ethernet Interface.
  395.   \param[in]   control  Operation
  396.   \param[in]   arg      Argument of operation (optional)
  397.   \return      \ref execution_status
  398. */
  399. static int32_t MAC_Control (uint32_t control, uint32_t arg) {

  401.   if ((ETH.Flags & ETH_POWER) == 0U) {
  402.     return ARM_DRIVER_ERROR;
  403.   }

  405.   switch (control) {
  406.     case ARM_ETH_MAC_CONFIGURE:
  407.       break;

  409.     case ARM_ETH_MAC_CONTROL_TX:
  410.       break;

  412.     case ARM_ETH_MAC_CONTROL_RX:
  413.       break;

  415.     case ARM_ETH_MAC_FLUSH:
  416.       break;

  418.     default:
  419.       return ARM_DRIVER_ERROR_UNSUPPORTED;
  420.   }
  421.   return ARM_DRIVER_OK;
  422. }


  425. /**
  426.   \fn          int32_t PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
  427.   \brief       Read Ethernet PHY Register through Management Interface.
  428.   \param[in]   phy_addr  5-bit device address
  429.   \param[in]   reg_addr  5-bit register address
  430.   \param[out]  data      Pointer where the result is written to
  431.   \return      \ref execution_status
  432. */
  433. static int32_t PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) {
  434.     int32_t  status = ARM_DRIVER_OK;

  436.     *data = dm9k_phy_read(reg_addr);
  437.     return (status);
  438. }

  440. /**
  441.   \fn          int32_t PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
  442.   \brief       Write Ethernet PHY Register through Management Interface.
  443.   \param[in]   phy_addr  5-bit device address
  444.   \param[in]   reg_addr  5-bit register address
  445.   \param[in]   data      16-bit data to write
  446.   \return      \ref execution_status
  447. */
  448. static int32_t PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) {
  449.   int32_t  status  = ARM_DRIVER_OK;

  451.         dm9k_phy_write(reg_addr, data);
  452.   return (status);
  453. }

  455. extern __weak void dm9k_re_packet(void);
  456. void dm9k_re_packet(void)
  457. {
  458.         ETH.cb_event(ARM_ETH_MAC_EVENT_RX_FRAME);
  459. }

  461. /* MAC Driver Control Block */
  462. extern
  463. ARM_DRIVER_ETH_MAC ARM_Driver_ETH_MAC_(ETH_MAC_NUM);
  464. ARM_DRIVER_ETH_MAC ARM_Driver_ETH_MAC_(ETH_MAC_NUM) = {
  465.   MAC_GetVersion,
  466.   MAC_GetCapabilities,
  467.   MAC_Initialize,
  468.   MAC_Uninitialize,
  469.   MAC_PowerControl,
  470.   MAC_GetMacAddress,
  471.   MAC_SetMacAddress,
  472.   MAC_SetAddressFilter,
  473.   MAC_SendFrame,
  474.   MAC_ReadFrame,
  475.   MAC_GetRxFrameSize,
  476.   MAC_GetRxFrameTime,
  477.   MAC_GetTxFrameTime,
  478.   MAC_ControlTimer,
  479.   MAC_Control,
  480.   PHY_Read,
  481.   PHY_Write
  482. };


  485. /* Driver Version */
  486. static const ARM_DRIVER_VERSION PHY_DriverVersion = {
  487.   ARM_ETH_PHY_API_VERSION,
  488.   ARM_ETH_PHY_DRV_VERSION
  489. };

  491. /**
  492.   \fn          ARM_DRV_VERSION GetVersion (void)
  493.   \brief       Get driver version.
  494.   \return      \ref ARM_DRV_VERSION
  495. */
  496. static ARM_DRIVER_VERSION PHY_GetVersion (void) {
  497.   return PHY_DriverVersion;
  498. }

  500. /**
  501.   \fn          int32_t Initialize (ARM_ETH_PHY_Read_t  fn_read,
  502.                                    ARM_ETH_PHY_Write_t fn_write)
  503.   \brief       Initialize Ethernet PHY Device.
  504.   \param[in]   fn_read   Pointer to \ref ARM_ETH_MAC_PHY_Read
  505.   \param[in]   fn_write  Pointer to \ref ARM_ETH_MAC_PHY_Write
  506.   \return      \ref execution_status
  507. */
  508. static int32_t PHY_Initialize (ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write) {
  509.   /* PHY_Read and PHY_Write will be re-used, no need to register them again */
  510.   (void)fn_read;
  511.   (void)fn_write;
  512.   return ARM_DRIVER_OK;
  513. }

  515. /**
  516.   \fn          int32_t Uninitialize (void)
  517.   \brief       De-initialize Ethernet PHY Device.
  518.   \return      \ref execution_status
  519. */
  520. static int32_t PHY_Uninitialize (void) {
  521.   return ARM_DRIVER_OK;
  522. }

  524. /**
  525.   \fn          int32_t PowerControl (ARM_POWER_STATE state)
  526.   \brief       Control Ethernet PHY Device Power.
  527.   \param[in]   state  Power state
  528.   \return      \ref execution_status
  529. */
  530. static int32_t PHY_PowerControl (ARM_POWER_STATE state) {
  531.   return ARM_DRIVER_OK;
  532. }

  534. /**
  535.   \fn          int32_t SetInterface (uint32_t interface)
  536.   \brief       Set Ethernet Media Interface.
  537.   \param[in]   interface  Media Interface type
  538.   \return      \ref execution_status
  539. */
  540. static int32_t PHY_SetInterface (uint32_t interface) {
  541.   /* Not used in this driver */
  542.   (void)interface;
  543.   return ARM_DRIVER_OK;
  544. }

  546. /**
  547.   \fn          int32_t SetMode (uint32_t mode)
  548.   \brief       Set Ethernet PHY Device Operation mode.
  549.   \param[in]   mode  Operation Mode
  550.   \return      \ref execution_status
  551. */
  552. #include "PHY_DM916x.h"
  553. static int32_t PHY_SetMode (uint32_t mode) {
  554.   uint16_t val = 0;

  556.   if ((ETH.Flags & ETH_POWER) == 0U) { return ARM_DRIVER_ERROR; }

  558.   val &= ~(BMCR_SPEED_SELECT | BMCR_DUPLEX_MODE |
  559.            BMCR_ANEG_EN    | BMCR_LOOPBACK);

  561.   switch (mode & ARM_ETH_PHY_SPEED_Msk) {
  562.     case ARM_ETH_PHY_SPEED_10M:
  563.       break;
  564.     case ARM_ETH_PHY_SPEED_100M:
  565.       val |= BMCR_SPEED_SELECT;
  566.       break;
  567.     default:
  568.       return ARM_DRIVER_ERROR_UNSUPPORTED;
  569.   }

  571.   switch (mode & ARM_ETH_PHY_DUPLEX_Msk) {
  572.     case ARM_ETH_PHY_DUPLEX_HALF:
  573.       break;
  574.     case ARM_ETH_PHY_DUPLEX_FULL:
  575.       val |= BMCR_DUPLEX_MODE;
  576.       break;
  577.   }

  579.   if (mode & ARM_ETH_PHY_AUTO_NEGOTIATE) {
  580.     val |= BMCR_ANEG_EN;
  581.   }

  583.   if (mode & ARM_ETH_PHY_LOOPBACK) {
  584.     val |= BMCR_LOOPBACK;
  585.   }

  587.   if (mode & ARM_ETH_PHY_ISOLATE) {
  588.     return ARM_DRIVER_ERROR_UNSUPPORTED;
  589.   }
  590.   
  591.   /* Apply configured mode */
  592.   return PHY_Write (DM9000_PHY, REG_BMCR, val);
  593. }

  595. /**
  596.   \fn          ARM_ETH_LINK_STATE GetLinkState (void)
  597.   \brief       Get Ethernet PHY Device Link state.
  598.   \return      current link status \ref ARM_ETH_LINK_STATE
  599. */
  600. static ARM_ETH_LINK_STATE PHY_GetLinkState (void) {
  601.   ARM_ETH_LINK_STATE state;
  602.   uint16_t           val = 0U;

  604.   if (ETH.Flags & PHY_POWER) {
  605.         PHY_Read(DM9000_PHY, REG_BMSR, &val);
  606.   }
  607.   state = (val & BMSR_LINK_STAT) ? ARM_ETH_LINK_UP : ARM_ETH_LINK_DOWN;

  609.   return (state);
  610. }

  612. /**
  613.   \fn          ARM_ETH_LINK_INFO GetLinkInfo (void)
  614.   \brief       Get Ethernet PHY Device Link information.
  615.   \return      current link parameters \ref ARM_ETH_LINK_INFO
  616. */
  617. static ARM_ETH_LINK_INFO PHY_GetLinkInfo (void) {

  619.   ARM_ETH_LINK_INFO info;
  620.   uint16_t          val = 0U;

  622.   if (ETH.Flags & PHY_POWER) {
  623.     /* Get operation mode indication from PHY DSCSR register */
  624.     PHY_Read(DM9000_PHY, REG_DSCSR, &val);
  625.   }

  627.   /* Link must be up to get valid state */
  628.   info.speed  = ((val & DSCSR_100M_FD)|(val & DSCSR_100M_HD)) ? ARM_ETH_SPEED_100M  : ARM_ETH_SPEED_10M;
  629.   info.duplex = ((val & DSCSR_100M_FD)|(val & DSCSR_10M_FD)) ? ARM_ETH_DUPLEX_FULL : ARM_ETH_DUPLEX_HALF;


  632.   return (info);
  633. }

  635. /* PHY Driver Control Block */
  636. extern
  637. ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(ETH_PHY_NUM);
  638. ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(ETH_PHY_NUM) = {
  639.   PHY_GetVersion,
  640.   PHY_Initialize,
  641.   PHY_Uninitialize,
  642.   PHY_PowerControl,
  643.   PHY_SetInterface,
  644.   PHY_SetMode,
  645.   PHY_GetLinkState,
  646.   PHY_GetLinkInfo
  647. };
复制代码




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发表于 2020-11-29 16:30:17 | 显示全部楼层
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