汇编代码疑问

snakeemail

1.1 问题描述

期望代码顺序为:

x=42;

Ok= 1;

但编译优化后:

Ok=1;

X=42;

1.2 解决方法

使用memory barriers技术，即让编译器知道一定要按这个顺序给出汇编代码。

在MDK里面，就是__dsb(unsigned int), __isb(unsigned int)。

然后我翻到了第8章，但是不理解表里面的Ordered Accessed是什么意思?

arm汇编手册第8章摘要

Memory barriers
Memory barriers ensure specific ordering properties between memory accesses. For more details on memory
barriers, see ARM ARM [v7 section A3.8.3]. The intrinsics in this section are available for all targets. They may be
no-ops (i.e. generate no code, but possibly act as a code motion barrier in compilers) on targets where the
relevant instructions do not exist, but only if the property they guarantee would have held anyway. On targets
where the relevant instructions exist but are implemented as no-ops, these intrinsics generate the instructions.
The memory barrier intrinsics take a numeric argument indicating the scope and access type of the barrier, as
shown in the following table. (The assembler mnemonics for these numbers, as shown in the table, are not
available in the intrinsics.) The argument should be an integral constant expression within the required range –
see section 4.3.1.

Examples
In this example, process P1 makes some data available to process P2 and sets a flag to indicate this.
P1:
value = x;
/* issue full-system memory barrier for previous store:
setting of flag is guaranteed not to be observed before
write to value */
__dmb(14);
flag = true;
P2:
/* busy-wait until the data is available */
while (!flag) {}
/* issue full-system memory barrier: read of value is guaranteed
not to be observed by memory system before read of flag */
__dmb(15);
use value;

eric2013

MPU配置里面有个Device和Strongly order和这个应该是一个。
===============
MPU 可以配置的三种内存类型如下：
Normal memory
CPU 以最高效的方式加载和存储字节、 半字和字，对于这种内存区，CPU 的加载或存储不一定要按照程序列出的顺序执行。

Device memory
对于这种类型的内存区，加载和存储要严格按照次序进行，这样是为了确保寄存器按照正确顺序设置。

Strongly ordered memory
程序完全按照代码顺序执行，CPU 需要等待当前的加载/存储指令执行完毕后才执行下一条指令。这样会导致性能下降  
===============
__DSB 指令：
Data Synchronization Barrier（数据同步隔离），比 DMB 严格，当所有在它前面的存储器访问操作都执行完毕后，才执行在它后面的指令。
__ISB 指令：
Instruction Synchronization Barrier（指令同步隔离），它会清洗流水线，以保证所有它前面的指令都执行完毕之后，才执行它后面的指令。

snakeemail

非常感谢。原来答案在MPU里面，一直都没用过，所以也没有看到。太感谢了。

snakeemail

eric2013 发表于 2021-1-4 10:34
MPU配置里面有个Device和Strongly order和这个应该是一个。
===============
MPU 可以配置的三种内存类型 ...

非常非常感谢。我没用过MPU，所以这部分文档没有看。