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各位好，我这边有一个Atmel ATSAMA5D31芯片用IAR 7.30版本建的工程编译出来的目标文件(.bin)只有800K左右，后面换成IAR 7.80版本编译以后目标文件就变得非常大,有接近24M, 而且我看文件中间大多填充的是0, 只是在文件末尾有放一些内容，我怀疑是ICF文件不兼容，因此将Icf贴了上来，有对IAR各个版本切换相关经验的兄弟能帮忙解答一下吗（附件中带了ICF文件以及.s文件）？
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20300000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_DDRAM_start__ = 0x20300000;
define symbol __ICFEDIT_region_DDRAM_end__ = 0x27FFFFFF; /* 128MB */
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x80000;
define symbol __ICFEDIT_size_svcstack__ = 0x100;
define symbol __ICFEDIT_size_irqstack__ = 0x40000;
define symbol __ICFEDIT_size_fiqstack__ = 0x100;
define symbol __ICFEDIT_size_undstack__ = 0x100;
define symbol __ICFEDIT_size_abtstack__ = 0x100;
define symbol __ICFEDIT_size_heap__ = 0x600000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_DDRAM_start__ to __ICFEDIT_region_DDRAM_end__];
define region NVRAM_region = mem:[from 0x50000000 to 0x50007fff];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block MEM_NCNB with alignment = 1024*1024 { section .mem_ncnb }; // cache off, write buffer off
define block MEM_NCB with alignment = 1024*1024 { section .mem_ncb }; // cache off, write buffer on
define block MEM_CNB with alignment = 1024*1024 { section .mem_cnb }; // cache on, write through
initialize by copy with packing = none { readwrite };
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
do not initialize { section .noinit, section NVRAM* };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { section ProgramEnd }; // 获取代码的长度
place in NVRAM_region { block NVRAM with fixed order {section NVRAM1, section NVRAM2, section NVRAM3,
section NVRAM4, section NVRAM5, section NVRAM6, section NVRAM7, section NVRAM8,
section NVRAM9, section NVRAM10, section NVRAM11, section NVRAM12, section NVRAM13,
section NVRAM14, section NVRAM15, section NVRAM16, section NVRAM17, section NVRAM18,
section NVRAM19, section NVRAM20, section NVRAM21, section NVRAM22, section NVRAM23,
section NVRAM24, section NVRAM25, section NVRAM26, section NVRAM27, section NVRAM28,
section NVRAM29, section NVRAM30, section NVRAM31, section NVRAM32, section NVRAM33,
section NVRAM34, section NVRAM35, section NVRAM36, section NVRAM37, section NVRAM38,
section NVRAM39, section NVRAM40, section NVRAM41, section NVRAM42, section NVRAM43,
section NVRAM44, section NVRAM45, section NVRAM46, section NVRAM47, section NVRAM48,
section NVRAM49, section NVRAM50, section NVRAM51, section NVRAM52, section NVRAM53,
section NVRAM54, section NVRAM55, section NVRAM56, section NVRAM57, section NVRAM58,
section NVRAM59, section NVRAM60, section NVRAM61, section NVRAM62, section NVRAM63,
section NVRAM64, section NVRAM65, section NVRAM66, section NVRAM67, section NVRAM68,
section NVRAM69, section NVRAM70, section NVRAM71, section NVRAM72, section NVRAM73,
section NVRAM74,
} };
place in RAM_region { readwrite,
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
block UND_STACK, block ABT_STACK, block HEAP, };
place in RAM_region { block MEM_NCNB, block MEM_NCB, block MEM_CNB };
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发表于 2023-3-29 17:32:27
发表于 2023-3-29 18:25:09
楼主
英雄所见略同，我正在往9.3x上折腾
