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链接地址:http://docs.zephyrproject.org/bo ... mimxrt1050_evk.html
Overview
The i.MX RT1050 is a new processor family featuring NXP’s advancedimplementation of the ARM Cortex-M7 Core. It provides high CPU performance andreal-time response. The i.MX RT1050 provides various memory interfaces,including SDRAM, Raw NAND FLASH, NOR FLASH, SD/eMMC, Quad SPI, HyperBus and awide range of other interfaces for connecting peripherals, such as WLAN,Bluetooth™, GPS, displays, and camera sensors. As with other i.MX processors,i.MX RT1050 also has rich audio and video features, including LCD display,basic 2D graphics, camera interface, SPDIF, and I2S audio interface.
Hardware
[li]MIMXRT1052DVL6A MCU (600 MHz, 512 KB TCM)[/li][li]Memory256 KB SDRAM[/li][li]64 Mbit QSPI Flash[/li][li]512 Mbit Hyper Flash[/li] DisplayEthernet[li]10/100 Mbit/s Ethernet PHY[/li] USB[li]USB 2.0 OTG connector[/li][li]USB 2.0 host connector[/li] Audio[li]3.5 mm audio stereo headphone jack[/li][li]Board-mounted microphone[/li][li]Left and right speaker out connectors[/li] PowerDebug[li]JTAG 20-pin connector[/li][li]OpenSDA with DAPLink[/li] Sensor[li]FXOS8700CQ 6-axis e-compass[/li][li]CMOS camera sensor interface[/li] Expansion port[li]Arduino interface[/li] CAN bus connector
For more information about the MIMXRT1050 SoC and MIMXRT1050-EVK board, seethese references:
Supported Features
The mimxrt1050_evk board configuration supports the following hardwarefeatures:Interface | Controller | Driver/Component | NVIC | on-chip | nested vector interrupt controller | SYSTICK | on-chip | systick | GPIO | on-chip | gpio | UART | on-chip | serial port-polling;serial port-interrupt | The default configuration can be found in the defconfig file:[blockquote]boards/arm/mimxrt1050_evk/mimxrt1050_evk_defconfig[/blockquote]Other hardware features are not currently supported by the port.
Connections and IOs
The MIMXRT1050 SoC has five pairs of pinmux/gpio controllers.Name | Function | Usage | GPIO_AD_B0_09 | GPIO | LED | GPIO_AD_B0_12 | LPUART1_TX | UART Console | GPIO_AD_B0_13 | LPUART1_RX | UART Console | WAKEUP | GPIO | SW0 |
System Clock
The MIMXRT1050 SoC is configured to use the 24 MHz external oscillator on theboard with the on-chip PLL to generate a 528 MHz system clock.
Serial Port
The MIMXRT1050 SoC has eight UARTs. One is configured for the console and theremaining are not used.
Programming and Debugging
The MIMXRT1050-EVK includes the NXP OpenSDA serial and debug adapterbuilt into the board to provide debugging, flash programming, and serialcommunication over USB.
To use the Segger J-Link tools with OpenSDA, follow the instructions in theSegger J-Link page using the Segger J-Link OpenSDA V2.1 Firmware.The Segger J-Link tools are the default for this board, therefore it is notnecessary to set OPENSDA_FW=jlink explicitly when you invoke makedebug.
With these mechanisms, applications for the mimxrt1050_evk boardconfiguration can be built and debugged in the usual way (seeBuild an Application and Run an Application for more details).
The pyOCD tools do not yet support this SoC.
Flashing
The Segger J-Link firmware does not support command line flashing, thereforethe usual flash build system target is not supported.
Debugging
This example uses the Hello World sample with theSegger J-Link tools. Run the following to build your Zephyrapplication, invoke the J-Link GDB server, attach a GDB client, and programyour Zephyr application to flash. It will leave you at a GDB prompt.
$ cd $ZEPHYR_BASE/samples/hello_world# Make a build directory, and use cmake to configure a Make-based build system mkdir build && cd build$ cmake -DBOARD=mimxrt1050_evk ..# Now run make on the generated build system make debug |
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