手册里的错误的确时有发生,比如第5版的863页,讲到数据阶段如何控制数据模式时:
The data phase can send/receive 1 bit at a time (over SO/SI in single SPI mode), 2 bits at a
time (over IO0/IO1 in dual SPI mode), or 4 bits at a time (over IO0/IO1/IO2/IO3 in quad SPI
mode). This can be configured using the ABMODE[1:0] field of QUADSPI_CCR[15:14]
register.
显然最后一句ABMODE是抄的交替字节的,应该是DMODE[1:0] field of QUADSPI_CCR[25:24] register。
我看了中文版第3版的,也是这样的,可能编者一直没注意到这个问题。